Exploring RTOS issues with a high-level model of a reconfigurable SoC platform

Reconfigurable resources are more and more envisaged inside System-on-Chip designs for facing with embedded computing power constraints. Moreover, a high level of flexibility of such platforms is required and can only be achieved with embedded software and real-time operating systems (RTOS) services. Unfortunately, this leads to very complex and heterogeneous platforms that cannot be easily validated nor modeled with classical design tools. This paper presents the objective and the proposed methodology of the OVERSOC project. This project aims at developing a global methodology and the associated tools for a design space exploration of interactions between embedded real-time operating systems and reconfigurable SoC platforms.